In this episode, we talk about chiplets, 3D stacking, heterogenous integration, and multi-die systems design. Stanford University’s Subhasish Mitra talks about his keynote at the HiPEAC conference, where he talked about using computation immersed in memory to break down the memory wall and the scaling wall and build a dream chip delivering 1000x energy efficiency. And then, we talk to Cadence, Synopsys, and Eliyan about some of the opportunities and challenges for chiplet design.